1. Field of the Invention
The invention relates to a thin film capacitor, and particularly to a thin film capacitor capable of stably operating in a high frequency region (GHz band) when used in a digital LSI operating at a high speed.
2. Description of the Related Art
Recent digital LSIS (large-scale integrated circuits), including microprocessors, are designed to have a high speed and a low power consumption. Accordingly, decoupling capacitors (also called bypass capacitors) are required to have an improved performance, the decoupling capacitor suppressing a change in the power supply voltage when an impedance load on an LSI is abruptly changed, to thereby decrease switching noise and to stabilize the operation of the LSI, which operates at a high speed, in the high frequency region.
On a prior wiring circuit board, a chip capacitor, as a decoupling capacitor, is mounted in the vicinity of an LSI chip, for the protection of the LSI due to a change in the power supply voltage and high frequency noise in the circuit board. However, in this case, rerouting the wiring line between the chip capacitor and the LSI chip on the circuit board is necessary and there is an inductance between leads for the rerouting. Accordingly, the effects, which the chip capacitor has on the suppression of the change in the power supply voltage to the LSI operating at a high frequency and the adsorption of high frequency ripple, are reduced.
To suppress the change in voltage, the capacitor is required to reduce an equivalent series resistance (ESR) and an equivalent series inductance (ESL). Particularly, the increase in inductance due to the rerouting of wiring lines affects the high frequency properties of a decoupling capacitor. The reduction in inductance becomes possible by locating a capacitor in the vicinity of an LSL and making as short as possible the rerouted wiring lines from an LSI power supply, and a grounding terminal, to the capacitor. Thus, it has been proposed to achieve a reduction in the noise of a power supply system by forming a dielectric thin-film capacitor on a ceramic circuit board for a reduction in inductance (JP-A-4-211191). It has been also proposed to reduce the inductance by connecting the upper and lower pads for a thin-film type capacitor formed on a supporting substrate having a via hole to an LSI and a circuit board, respectively (i.e., the capacitor is interposed between the LSI and the circuit board on which the LSL is to be mounted) (JP-A-7-176453).
Referring to FIGS. 1A to 1I, a conventional and common method for manufacturing a thin film capacitor will be described. As shown in FIG. 1A, a film for a lower electrode is formed on a base substrate 1 of silicon or the like, and is subjected to a shaping process (patterning by etching) to provide a lower electrode 2 (in the case of a thin film capacitor, the manufacturing of which is described here, the shaping process for the lower electrode is not performed in the region shown in the drawing). A dielectric thin film 3 is formed on the lower electrode 2 (FIG. 1B), and is subjected to a shaping process to form a dielectric layer 3a (FIG. 1C). A film 4 for an upper electrode is then formed (FIG. 1D), and is subjected to a shaping process to form an upper electrode 4a (FIG. 1E). An insulating film 5 is formed, and is then patterned to form openings 6 and 7 communicating with the lower electrode 2 and the upper electrode 4a, respectively (FIG. 1F). Subsequently, a resist pattern 8 is formed on the insulating film 5, as shown in FIG. 1G. By a plating process, a conductor is filled in the openings 6, 7, and pads 9 are then formed (FIG. 1H). After the removal of the resist pattern 8, solder bumps 10 are formed on the pads 9, as shown in FIG. 1I, to provide a thin film capacitor.
This method needs, after the formation of the films for the lower electrode, the dielectric layer and the upper electrode constructing a capacitor, the processes for respectively shaping the formed films, so that the method provides many opportunities for impurities, such as dirt or particles, to be deposited on the interface between the electrode and the dielectric. Accordingly, with this method it is difficult to provide highly reliable thin film capacitors. Furthermore, the multitude of processing steps in the method has been the cause of the prevention of efficient production of capacitors.